The important performance indicators of data center switches – cache

Switches are indispensable network devices in the data center and play an important role in the data center. In normal use and procurement, most of them pay attention to the performance indicators of the switch’s backplane bandwidth, port density, single port speed, protocol characteristics, etc. Few people pay attention to the cache index, which is a frequently overlooked indicator. In fact, caching is an important performance parameter of data center switches, and is an important indicator to measure the performance of a switch device. The cache of the switch is different from the usual cache concept. Usually, the cache means that when certain hardware wants to read data, it will first find the required data from the cache. If it is found, it will be executed directly. If it is not found, it will be retrieved from the memory. Looking for it, obviously, the data in the cache is searched much faster than in memory. This is a memory address space inside the CPU. On the switch, the cache is the data exchange buffer, sometimes called the packet buffer size, which is a queue structure used by the switch to coordinate the speed matching between different network devices. Burst data can be stored in the buffer until it is processed by the slow device. The switch has three forwarding modes: straight-through forwarding, store-and-forward, and fragment less forwarding. The most widely used is the store-and-forward mode. In fact, no matter which forwarding mode, the cache is used, but the direct forwarding only parses the first few bytes of the message and forwards it. The amount of data stored in the cache is small, and the forwarding speed is fast, but because there is no overall Data is verified and it is easy to forward error packets. The on-chip cache of most switches is not large, usually a few megabytes to tens of megabytes. Although the single-port bandwidth has grown from 1G to 100G in less than a decade, the cache has not been greatly improved, if a 100G port In the case of bursty traffic, packet loss occurs in a dozen or so MBs. Obviously, there will be restrictions in practical applications, unless there is no sudden traffic on the application traffic.

  Then some people will have doubts since the cache is so important, why not do it bigger? In fact, the existing chip integration technology should not be difficult to achieve. Indeed, the cache can theoretically be scaled up by the chip process design, but too large caches can affect the forwarding speed of packets under normal communication conditions because too large buffer space requires a relatively small amount of addressing time and increases the cost of the device. In some application scenarios where the delay requirement is relatively high, the cache is too large to be counterproductive, so it is not easy to expand the cache. In the two aspects of cache and delay, “fish and bear’s paw is not available.” Of course, with the advancement of technology, the cache capacity of the switch can be continuously improved without increasing the delay. Depending on the clock and bus bandwidth capabilities, cache performance is difficult to increase significantly. Considering the power consumption and cost balance, the cache capacity will not increase significantly. Some switches also hang a DRAM cache outside the switch chip to increase the cache capacity of the switch, so the delay may be larger, but the cache can be made very large, reaching more than 1G. The cache is important, but we need a lot of caches, but there is no correct answer. A huge cache means that the network does not discard any traffic, and it also means an increase in network latency, depending on the services of the data center. For example, in the search business, a search needs to find results in a massive database, which is prone to network burst traffic and even cause network congestion. In such a network service, it is necessary to deploy a cached switch device; in the financial field, especially in stocks. In a securities trading network, a nanosecond can bring huge gains or losses. Such a field requires very high network latency, does not allow congestion, and does not require much buffering. Some financial data centers also require low latency. Switch, forwarding delay control in nanoseconds.

  Caches are usually caused by different network interface rates, sudden bursts of traffic, or many-to-one traffic. The most common problem is a sudden change in many-to-one traffic. For example, an application is built on multiple server cluster nodes. If one of the nodes requests data from all other nodes at the same time, all replies should arrive at the same time. When this happens, all network traffic floods flood the requestor’s switch port. If the switch does not have enough exit buffers, it may discard some traffic or increase application latency. Enough network buffers can prevent packet loss or network latency due to low-level protocols. The cache is a holistic concept for the switch. The entire switch chip shares the cache. Each port can be adjusted. The switch has management for these caches. Therefore, two modes appear QOS mode and FC. mode. Each packet on the hardware is stored, processed and then forwarded, but the storage space is limited, so when the cache is insufficient, packet loss occurs. In the QOS mode, flow control frames are not sent when congestion occurs. However, traffic of different priorities on the port can be scheduled. Packets must be dropped. Packets with low priority are discarded. The configuration can be selective. Lose the package. In the FC mode, a flow control frame is generated when congestion occurs. (Management is required. The default device is not enabled. If the peer device is congested, the flow control frame will be sent. The device responds to the flow control frame. This will be an extremely Large consumption of device port cache). QOS mode all caches are shared by all ports, FC mode cache is evenly fixed to each port, so QOS mode single port may get more storage capacity, reducing packet loss, but the impact can affect other The transmission of low priority packets on the port. The current switch basically adopts a combination of two modes, that is, a fixed buffer is allocated for each port to ensure a certain forwarding bandwidth, and at the same time, a part of the cache is reserved as a common part, and when a part with a fixed port allocation is insufficient, Using the public part, in order to prevent one port from being congested, all shared buffers are occupied, and each port can also set a maximum allowable cache, so as to ensure that when the multi-port is congested, the public cache part remains, so the cache capacity is not Big, but management is more flexible. However, since cache management is a very low-level thing of the switch, the adjustment does not greatly affect the forwarding of the device. Therefore, this part of the adjustment is generally adjusted before the device leaves the factory. The default is the most common way, and there are special application scenarios. According to the actual situation, it is adjusted by professional technicians.

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